AD7606 · fixed two · MPU-6050
Direct path for the identified local ADC and IMU modules. Four-channel firmware is intentionally rejected.
A practical guide to choosing one hardware configuration, assembling it in controlled stages, recording synchronized EMG and motion data, and keeping software evidence separate from physical measurements.
Every package combines one ADC choice, one EMG capacity, and one IMU family. Use its breadboard plan, firmware, converter, PCB, and documentation together. Mixing packages can silently change GPIOs, bus protocols, timing records, and channel rules.
Direct path for the identified local ADC and IMU modules. Four-channel firmware is intentionally rejected.
Same two-channel scope with SPI motion sensors and timestamp-bearing sensor packets.
Four populated analog inputs. Firmware enables either two or four simultaneous 8 kHz channels.
Twenty-four-bit ADC design with external clock and ADC-specific CRC/status handling. Lab carrier availability remains a dependency.
| Decision | AD7606 | ADS131M04 | ICM-42688-P | MPU-6050 |
|---|---|---|---|---|
| Interface | Simultaneous ADC, serial readout | Simultaneous delta-sigma ADC | SPI | I²C with FIFO |
| Recorded precision | 16-bit signed codes | 24-bit signed codes | Sensor timestamp retained | ESP32 interrupt/FIFO estimate |
| Lab dependency | Qualify exact seller module | Obtain and adapt a carrier | Select exact carrier | Qualify GY-521 power and pull-ups |
| Key open test | Mode straps, VIO, header and codes | Input loading, clock, CRC and noise | Carrier mapping and clock alignment | Rise time, FIFO timing and drift |
EMG and motion enter the ESP32-S3 through different hardware paths. The controller adds its timing evidence, writes the authoritative recording to microSD, and optionally forwards a best-effort copy over Wi-Fi.
Foot and shank IMUs connect by SPI or shared I²C. ICM packets retain sensor timing; MPU packets retain FIFO order and ESP32 timing estimates.
microSD is the primary recording. Wi-Fi is a live convenience copy whose gaps remain visible rather than being hidden or filled.
ADC frames are simultaneous within the selected converter, but EMG and IMU clocks are independent. The recording preserves counters, trigger or data-ready timing, FIFO order, and read timing so alignment can be characterized later. Filtering and analog stages also introduce delay that must be measured before interpreting millisecond relationships.
Build one block at a time. Later diagnostics preserve earlier stages, so a failure can be isolated without guessing across the complete system.
Verify polarity, regulated rails, startup, ripple, load response, and temperature with current limiting and dummy loads.
Verify programming, reset, buttons, LEDs, current, USB detection, and recording inhibition.
Check communication or status, conversion timing, known DC codes, simultaneous frames, counters, and faults.
Use a synthetic source to measure offset, scaling, passband, baseline noise, clipping, and unplugged bias.
Verify identity, two/four-channel rules, disabled-channel handling, timing, and crosstalk.
Add one IMU, then two. Verify identity, orientation, 200 Hz rate, stationary readings, timing evidence, and cable behavior.
Record continuously, convert data, test storage errors, fill behavior, and interrupted-file recovery.
Observe explicit wireless gaps while confirming the primary SD file has no unexplained loss under radio load.
Measure startup/shutdown, one-hour recording behavior, rail stability, temperature, and at least two hours of runtime.
Check mounting, motion artifact, cable security, AFO clearance, ethics, consent, and electrical safety before supervised recording.
Open an interactive staged build ↗ Read the detailed Markdown guide
Run commands from the selected design package. Expandable packages accept two or four EMG channels; fixed-two packages accept only two. Breadboard builds use GPIO47 for SD CMD, while compact-PCB builds use GPIO38.
cd designs/<selected-configuration>/firmware
idf.py -B build-breadboard-2 \
-DEMG_CHANNEL_COUNT=2 \
-DAFO_HARDWARE=breadboard \
-DAFO_WIFI=1 \
-DAFO_DIAGNOSTIC_STAGE=0 \
-DAFO_IMU_COUNT=2 build
cd designs/<selected-configuration>
python3 -m venv .venv
source .venv/bin/activate
python -m pip install -r host/requirements.txt
python host/convert.py trial.afolog --out exported-trial
python host/live_receiver.py --help
# Join the recorder access point, start the receiver,
# then start recording on the device.
The converter exports timestamped EMG and IMU tables, metadata, quality findings, and basic plots. Recovery mode salvages valid records from an interrupted file and reports damage; it does not invent missing samples. Keep the original binary recording unchanged.
The repository preserves raw JSON, logs, reports, and manifests. The summary below is intentionally split by evidence type.
Laboratory firmware 1.12 compiles in nine profiles and passes the host and native tests. All 18 integrated cases pass on its simulation image in Wokwi’s web editor (12 October 2026), checked with the production converter and live decoder. The 1.11 run found a Wi-Fi preview race (a new session’s first data packet could precede its metadata), which 1.12 fixes. The AD7606 was checked against ADI’s Rev. G data sheet. Following ADI AN-1091, the PCB now holds the converter in shutdown until the firmware releases STBY on GPIO14, and a BAT760 diode limits VDRIVE − AVCC while the 5 V rail starts. This is DRC/ERC clean but not yet built. Its ICM-42688-P setup was checked line by line against TDK’s official datasheet (DS-000347 rev 1.6) and the MIKROE carrier schematic: every register write, the 16-byte FIFO packet, the 32/30 µs timestamp tick, SPI timing and supply limits match, and the production driver runs against a register-level sensor model with no rule violations. Two IMU-only bench builds (diagnostic-imu-bench-one and -two) print PASS/FAIL verdicts for identification, sample rate, timestamp step, gravity magnitude and gyroscope bias, with rate gates at the datasheet’s ±2 % clock tolerance; the converter adds a host_time_fitted_us column that removes the sensor clock error from IMU-to-EMG alignment. These are software and datasheet checks; the first measurement on real carriers is still pending. All eighteen v1.6 cases pass actual ESP-IDF execution in Wokwi’s web simulator, with complete exports checked by the converter and live decoder. Nominal saved acquisition has no detected sample loss. The recorder runs acquisition, FreeRTOS, FatFS and UDP together with documented sensor, storage and radio substitutes. The complete visible scene passed an additional nominal run. Earlier failed or incomplete attempts remain preserved; physical performance and a current downloaded VCD trace remain unqualified. The other five designs carry the same ported fixes (firmware dual-1.3 / mpu6050-1.3, 47 profiles rebuilt); their other evidence is unchanged.
Read the integrated test report ↗ Case-by-case results ICM-42688-P setup and bench check Register-model results
The complete-scene pin observer now verifies 10,041 ADC conversions/reads and both 200 Hz interrupt streams. An independent saved-data audit checks 21,116 record CRCs and CSV rows across two synthetic captures; examples include volts, g, degrees/s, channel labels, timing qualifications and quality reports. The partial derived pin waveform is explicitly separate from the unavailable native full-session VCD.
Read and download the saved data ↗ Inspect digital timing
The figures below describe the earlier six-package release. They do not imply that all six setups have run the new integrated simulation.
Detailed validation status · Per-design automated results (JSON) · Wiring validation (JSON)
Human recording is a separate research activity. It requires institutional approval appropriate to the study, informed consent, exclusion and stop criteria, an electrical-safety review, a supervised procedure, and a plan for pseudonymous data handling.
The leg and AFO views illustrate placement only. They do not establish patient fit, pressure safety, comfort, biomechanics, or clinical benefit.
Package-specific documentation takes priority for exact component values, terminals, build profiles, and numerical limits. Project-level pages explain the shared workflow and evidence boundary.
System architecture, staged build, firmware profiles, SD differences, and recording workflow.
Current readiness, detailed validation, wiring coverage, and machine-readable results.
Manufacturer documents, third-party notices, publication record, and provenance boundary.
How to preserve configuration consistency, evidence, and attribution when proposing changes.